The invention is directed to a programmable arrangement for operating binary input signals upon employment of a matrix that is composed of data lines, of coupling lines crossing therewith and of coupling elements arranged at the coupling points of the data lines and coupling lines.
Programmable circuits, abbreviated as PLA, are known (see, for example, Weiss, Horninger, Integrierte MOS-Schaltungen, Springer-Verlag 1982, pages 295 through 298). Such programmable circuits contain an AND level and an OR level. The operation of the input signals according to a function table stored in the AND level ensues in the AND level. These operation results of the AND level that are also referred to as product terms are supplied to the OR level and are operated there according to the function table contained in the OR level to form what are referred to as sum terms. The sum terms are output at the outputs of the OR level. Such a PLA has input lines that lead to the AND level and output lines that lead out from the OR level available to it.